View MAX8726EUE-T_5101230.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

general description the max1748/max8726 triple-output dc-dc converters in a low-profile tssop package provide the regulated voltages required by active-matrix, thin-film transistor (tft) liquid-crystal displays (lcds). one high-power dc-dc converter and two low-power charge pumps convert the +3.3v to +5v input supply voltage into three independent output voltages. the primary 1mhz dc-dc converter generates a boost- ed output voltage (v main ) up to 13v using ultra-small inductors and ceramic capacitors. the low-power bicmos control circuitry and the low on-resistance (0.35 ) of the integrated power mosfet allows effi- ciency up to 93%. the dual charge pumps independently regulate one positive output (v pos ) and one negative output (v neg ). these low-power outputs use external diode and capacitor stages (as many stages as required) to regu- late output voltages up to +40v and down to -40v. a proprietary regulation algorithm minimizes output rip- ple, as well as capacitor sizes for both charge pumps. for both the max1748 and max8726, the supply sequence is v main first, v neg next, and finally v pos . the max1748 soft-starts each supply as soon as the previous supply finishes. the max8726 adds a delay between the startups of v main and v neg and also between v neg and v pos . the max1748/max8726 are available in the ultra-thin tssop package (1.1mm max height). applications tft active-matrix lcd displays passive-matrix lcd displays pdas digital still cameras camcorders features ? three integrated dc-dc converters ? 1mhz current-mode pwm boost regulator up to +13v main high-power output ?% accuracy high efficiency (93%) ? dual charge-pump outputs up to +40v positive charge-pump output down to -40v negative charge-pump output ? internal supply sequencing ? internal power mosfets ? +2.7v to +5.5v input supply ? 0.1? shutdown current ? 0.6ma quiescent current ? internal soft-start ? power-ready output ? ultra-small external components ? thin tssop package (1.1mm max) max1748/max8726 triple-output tft-lcd dc-dc converters ________________________________________________________________ maxim integrated products 1 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 rdy tgnd lx pgnd supp drvp supn drvn shdn top view max1748 max8726 tssop fb intg ref in gnd fbp fbn a "+" sign will replace the first pin indicator on lead-free packages. pin configuration 19-3430; rev 0; 10/04 for free samples and the latest literature, visit www.maxim-ic.com or phone 1-800-998-8800. for small orders, phone 1-800-835-8769. evaluation kit available ordering information typical operating circuit appears at end of data sheet. part temp range pin-package max1748 eue -40? to +85? 16 tssop max8726 eue -40? to +85? 16 tssop
max1748/max8726 triple-output tft-lcd dc-dc converters 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v in = +3.0v, shdn = in, v supp = v supn = 10v, tgnd = pgnd = gnd, c ref = 0.22?, c intg = 470pf, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. in, shdn , tgnd to gnd .........................................-0.3v to +6v drvn to gnd .........................................-0.3v to (v supn + 0.3v) drvp to gnd..........................................-0.3v to (v supp + 0.3v) pgnd to gnd.....................................................................?.3v rdy to gnd ...........................................................-0.3v to +14v lx, supp, supn to pgnd .....................................-0.3v to +14v intg, ref, fb, fbn, fbp to gnd ...............-0.3v to (v in + 0.3v) continuous power dissipation (t a = +70?) 16-pin tssop (derate 9.4mw/? above +70?) ..........755mw operating temperature range max1748eue/max8726eue..........................-40? to +85? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? parameter symbol conditions min typ max units input supply range v in 2.7 5.5 v input undervoltage threshold v uvlo v in rising, 40mv hysteresis (typ) 2.2 2.4 2.6 v in quiescent supply current i in v fb = v fbp = 1.5v, v fbn = -0.2v 0.6 1 ma supp quiescent current i supp v fbp = 1.5v 0.4 0.8 ma supn quiescent current i supn v fbn = -0.1v 0.4 0.8 ma in shutdown current v shdn = 0, v in = 5v 0.1 10 ? supp shutdown current v shdn = 0, v supp = 13v 0.1 10 ? supn shutdown current v shdn = 0, v supn = 13v 0.1 10 ? main boost converter output voltage range v main v in 13 v fb regulation voltage v fb t a = 0 c to +85 c 1.235 1.248 1.261 v fb input bias current i fb v fb = 1.25v, intg = gnd -50 +50 na operating frequency f osc 0.85 1 1.15 mhz oscillator maximum duty cycle 78 85 90 % load regulation i main = 0 to 200ma, v main = 10v 0.2 % line regulation 0.1 % / v integrator gm 320 ?ho lx switch on-resistance r lx ( on ) i lx = 100ma 0.35 0.7 lx leakage current i lx v lx = 13v 0.01 20 ? phase i = soft-start (1.0ms) 0.275 0.380 0.500 phase ii = soft-start (1.0ms) 0.75 phase iii = soft-start (1.0ms) 1.12 lx current limit i lx ( max ) phase iv = fully on (after 3.0ms) 1.1 1.5 2.0 a maximum rms lx current 1a soft-start period t ss power-up to the end of phase iii 3072 / f osc s fb fault trip level 1.07 1.1 1.14 v positive charge pump v supp input supply range v supp 2.7 13.0 v
max1748/max8726 triple-output tft-lcd dc-dc converters _______________________________________________________________________________________ 3 electrical characteristics (continued) (v in = +3.0v, shdn = in, v supp = v supn = 10v, tgnd = pgnd = gnd, c ref = 0.22?, c intg = 470pf, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.) parameter symbol conditions min typ max units operating frequency 0.5 x f osc hz fbp regulation voltage v fbp 1.20 1.25 1.30 v fbp input bias current i fbp v fbp = 1.5v -50 +50 na drvp pch on-resistance 310 v fbp = 1.213v 1.5 4 drvp nch on-resistance v fbp = 1.275v 20 k fbp power-ready trip level rising edge 1.091 1.125 1.159 v fbp fault trip level falling edge 1.11 v maximum rms drvp current 0.1 a negative charge pump v supn input supply range v supn 2.7 13.0 v operating frequency 0.5 x f osc hz fbn regulation voltage v fbn -50 0 +50 mv fbn input bias current i fbn v fbn = -0.05v -50 +50 na drvn pch on-resistance 310 v fbn = 0.035v 1.5 4 drvn nch on-resistance v fbn = -0.025v 20 k fbn power-ready trip level rising edge 80 110 165 mv fbn fault trip level falling edge 130 mv maximum rms drvn current 0.1 a reference reference voltage v ref -2? < i ref < +50? 1.231 1.25 1.269 v reference undervoltage threshold v ref rising 0.9 1.05 1.2 v logic signals shdn input low voltage 0.4v hysteresis (typ) 0.9 v shdn input high voltage 2.1 v shdn input current i shdn 0.01 1a rdy output low voltage i sink = 2ma 0.25 0.5 v rdy output high voltage v rdy = 13v 0.01 1a
max1748/max8726 triple-output tft-lcd dc-dc converters 4 _______________________________________________________________________________________ parameter symbol conditions min max units input supply range v in 2.7 5.5 v input undervoltage threshold v uvlo v in rising, 40mv hysteresis (typ) 2.2 2.6 v in quiescent supply current i in v fb = v fbp = 1.5v, v fbn = -0.2v 1 ma supp quiescent current i supp v fbp = 1.5v 0.8 ma supn quiescent current i supn v fbn = -0.1v 0.8 ma in shutdown current v shdn = 0, v in = 5v 10 ? supp shutdown current v shdn = 0, v supp = 13v 10 ? supn shutdown current v shdn = 0, v supn = 13v 10 ? main boost converter output voltage range v main v in 13.0 v fb regulation voltage v fb 1.222 1.271 v fb input bias current i fb v fb = 1.25v, intg = gnd -50 +50 na operating frequency f osc 0.75 1.25 mhz oscillator maximum duty cycle 78 90 % lx switch on-resistance r lx ( on ) i lx = 100ma 0.7 lx leakage current i lx v lx = 13v 20 ? phase i = soft-start (1.0ms) 0.275 0.500 lx current limit i lx ( max ) phase iv = fully on (after 3.0ms) 1.1 2.0 a fb fault trip level 1.07 1.14 v positive charge pump supp input supply range v supp 2.7 13.0 v fbp regulation voltage v fbp 1.20 1.30 v fbp input bias current i fbp v fbp = 1.5v -50 +50 na drvp pch on-resistance 10 v fbp = 1.213v 4 drvp nch on-resistance v fbp = 1.275v 20 k fbp power-ready trip level rising edge 1.091 1.159 v negative charge pump supn input supply range v supn 2.7 13.0 v fbn regulation voltage v fbn -50 +50 mv fbn input bias current i fbn v fbn = -0.05v -50 +50 na drvn pch on-resistance 10 v fbn = 0.035v 4 drvn nch on-resistance v fbn = -0.025v 20 k fbn power-ready trip level rising edge 80 165 mv reference reference voltage v ref -2? < i ref < +50? 1.223 1.269 v reference undervoltage v ref rising 0.9 1.2 v electrical characteristics (continued) (v in = +3.0v, shdn = in, v supp = v supn = 10v, tgnd = pgnd = gnd, c ref = 0.22?, c intg = 470pf, t a = -40? to +85? , unless otherwise noted.) (note 1)
max1748/max8726 triple-output tft-lcd dc-dc converters _______________________________________________________________________________________ 5 9.84 9.90 9.88 9.86 9.92 9.94 9.96 9.98 10.00 10.02 10.04 0 200 100 300 400 500 600 main output voltage vs. load current max1748/8726 toc01 i main (ma) v main (v) v in = 3.3v v in = 5.0v 60 65 70 75 80 85 90 95 100 0 200 100 300 400 500 600 main step-up converter efficiency vs. load current (boost only) max1748/8726 toc02 i main (ma) efficiency (%) v in = 3.3v v main = 10v v in = 5.0v 60 65 70 75 80 85 90 95 100 0 200 100 300 400 500 800 600 700 main step-up converter efficiency vs. load current (boost only) max1748/8726 toc03 i main (ma) efficiency (%) v in = 3.3v v main = 8v v in = 5.0v 50 55 60 65 70 75 80 85 90 0 100 50 150 200 250 400 300 350 efficiency vs. load current (boost converter and charge pumps) max1748/8726 toc04 i main (ma) efficiency (%) v main = 8v v in = 3.3v v neg = -5v with i neg = 10ma v pos = 15v with i pos = 5ma v main = 10v -5.05 -4.95 -5.00 -4.80 -4.85 -4.90 -4.65 -4.70 -4.75 -4.60 01520 5 10 25303540 negative charge-pump output voltage vs. load current max1748/8726 toc05 i neg (ma) v neg (v) v supn = 6v v neg = -5v v supn = 8v v supn = 10v 20 30 50 40 70 60 80 01520 5 10 25303540 negative charge-pump efficiency vs. load current max1748/8726 toc06 i neg (ma) efficiency (%) v supn = 6v v neg = -5v v supn = 8v v supn = 10v typical operating characteristics (circuit of figure 5, v in = 3.3v, t a = +25?, unless otherwise noted.) electrical characteristics (continued) (v in = +3.0v, shdn = in, v supp = v supn = 10v, tgnd = pgnd = gnd, c ref = 0.22?, c intg = 470pf, t a = -40? to +85? , unless otherwise noted.) (note 1) parameter symbol conditions min max units logic signals shdn input low voltage 0.45v hysteresis (typ) 0.9 v shdn input high voltage 2.1 v shdn input current i shdn 1a rdy output low voltage i sink = 2ma 0.5 v rdy output high leakage v rdy = 13v 1 a note 1: specifications from 0? to -40? are guaranteed by design, not production tested.
max1748/max8726 triple-output tft-lcd dc-dc converters 6 _______________________________________________________________________________________ typical operating characteristics (continued) (circuit of figure 5, v in = 3.3v, t a = +25?, unless otherwise noted.) 8 10 18 20 12 16 14 22 24 58 79 6101112 maximum positive charge-pump output voltage vs. supply voltage max1748/8726 toc10 v supp (v) v pos (v) i pos = 10ma v pos = 22v i pos = 1ma i pos = 20ma 0.80 0.85 0.90 1.05 1.00 0.95 1.10 1.15 1.20 2.5 3.5 3.0 4.0 4.5 5.0 5.5 switching frequency vs. input voltage max1748/8726 toc11 input voltage (v) switching frequency (mhz) measured from the falling edge of lx v main = 10v i main = 100ma 1.244 1.246 1.250 1.248 1.252 1.254 020 15 10 30 25 535404550 reference voltage vs. reference load current max1748/8726 toc12 i ref ( a) v ref (v) v in = 3.3v v main 10mv/div v neg 10mv/div v pos 10mv/div ripple waveforms max1748/8726 toc13 1 s/div v main = 10v, i main = 200ma, v neg = -5v, i neg = 10ma, v pos = 15v, i pos = 10ma i main 200ma/div i lx 500ma/div v main 200mv/div load-transient response max1748/8726 toc14 100 s/div v in = 3.3v, v main = 10v, r main = 500 to 50 (20ma to 200ma) i main 200ma/div i lx 500ma/div v main 200mv/div load-transient response without integrator max1748/8726 toc15 100 s/div v in = 3.3v, v main = 10v, intg = ref, r main = 500 to 50 (20ma to 200ma) -11 -9 -10 -7 -8 -4 -5 -6 -3 58 67 9101112 maximum negative charge-pump output voltage vs. supply voltage max1748/8726 toc07 v supn (v) v neg (v) i neg = 20ma i neg = 1ma i neg = 10ma v neg = -10ma 14.4 14.5 14.6 14.9 15.0 14.7 14.8 15.2 15.1 15.3 08 610 2 4 12 14 16 18 20 positive charge-pump output voltage vs. load current max1748/8726 toc08 i pos (ma) v pos (v) v supn = 12v v supn = 8v v supn = 10v 40 50 80 60 70 90 100 08 610 2 4 12 14 16 18 20 positive charge-pump efficiency vs. load current max1748/8726 toc09 i pos (ma) efficiency (%) v supp = 12v v supp = 8v v supp = 10v
max1748/max8726 triple-output tft-lcd dc-dc converters _______________________________________________________________________________________ 7 typical operating characteristics (continued) (circuit of figure 5, v in = 3.3v, t a = +25?, unless otherwise noted.) pin description v main 5v/div 2v 10v 0 i lx 500ma/div main boost startup waveform max1748/8726 toc16 1ms/div r main = 1k , v main = 10v v shdn 2v/div 0 0 v main 5v/div 2v 10v 0 i lx 500ma/div main boost startup waveform with load max1748/8726 toc17 1ms/div v main = 10v, r main = 50 ( 200ma) v shdn 2v/div 0 0 v main 5v/div v neg 5v/div v pos 10v/div max1748 power-up sequencing max1748/8726 toc18 2ms/div v main = 10v, v neg = -5v, v pos = 15v v shdn 2v/div pin name function 1 rdy active-low, open-drain output. indicates all outputs are ready. the on-resistance is 125 (typ). 2fb main boost regulator feedback input. regulates to 1.248v nominal. connect feedback resistive divider to analog ground (gnd). 3 intg main boost integrator output. if used, connect 470pf to analog ground (gnd). to disable integrator, connect to ref. 4in supply input. +2.7v to +5.5v input range. bypass with a 0.1? capacitor between in and gnd, as close to the pins as possible. 5 gnd analog ground. connect to power ground (pgnd) underneath the ic. 6 ref internal reference bypass terminal. connect a 0.22? capacitor from this terminal to analog ground (gnd). external load capability to 50?. 7 fbp positive charge-pump regulator feedback input. regulates to 1.25v nominal. connect feedback resistive divider to analog ground (gnd). v main 5v/div v neg 5v/div v pos 10v/div max8726 power-up sequencing max1748/8726 toc19 4ms/div v main = 10v, v neg = -5v, v pos = 15v v shdn 5v/div
max1748/max8726 triple-output tft-lcd dc-dc converters 8 _______________________________________________________________________________________ detailed description the max1748/max8726 are highly efficient triple-output power supplies for tft-lcd applications. these devices contain one high-power step-up converter and two low- power charge pumps. the primary boost converter uses an internal n-channel mosfet to provide maximum efficiency and to minimize the number of external compo- nents. the output voltage of the main boost converter (v main ) can be set from v in to 13v with external resistors. the dual charge pumps independently regulate a posi- tive output (v pos ) and a negative output (v neg ). these low-power outputs use external diode and capacitor stages (as many stages as required) to regulate output voltages up to +40v and down to -40v. a proprietary regulation algorithm minimizes output ripple as well as capacitor sizes for both charge pumps. also included in the max1748/max8726 is a precision 1.25v reference that sources up to 50?, logic shut- down, soft-start, power-up sequencing, fault detection, and an active-low open-drain ready output. main boost converter the max1748/max8726 main step-up converter switches at a constant 1mhz internal oscillator frequen- cy to allow the use of small inductors and output capacitors. the mosfet switch pulse width is modulat- ed to control the power transferred on each switching cycle and to regulate the output voltage. during pwm operation, the internal clock? rising edge sets a flip-flop, which turns on the n-channel mosfet (figure 1). the switch turns off when the sum of the voltage-error, slope-compensation, and current-feed- back signals trips the multi-input comparator and resets the flip-flop. the switch remains off for the rest of the clock cycle. changes in the output-voltage error signal shift the switch current trip level, consequently modulating the mosfet duty cycle. dual charge-pump regulator the max1748/max8726 contain two individual low- power charge pumps. one charge pump inverts the supply voltage (supn) and provides a regulated nega- tive output voltage. the second charge pump doubles the supply voltage (supp) and provides a regulated positive output voltage. the max1748/max8726 con- tain internal p-channel and n-channel mosfets to con- trol the power transfer. the internal mosfets switch at a constant 500khz (0.5 x f osc ). negative charge pump during the first half-cycle, the p-channel mosfet turns on and the flying capacitor c5 charges to v supn minus a diode drop (figure 2). during the second half-cycle, the p-channel mosfet turns off, and the n-channel mosfet turns on, level shifting c5. this connects c5 in parallel with the reservoir capacitor c6. if the voltage across c6 minus a diode drop is lower than the voltage across c5, charge flows from c5 to c6 until the diode (d5) turns off. the amount of charge transferred to the output is controlled by the variable n-channel on-resistance. positive charge pump during the first half-cycle, the n-channel mosfet turns on and charges the flying capacitor c3 (figure 3). this initial charge is controlled by the variable n-channel on- resistance. during the second half-cycle, the n-channel mosfet turns off and the p-channel mosfet turns on, level shifting c3 by v supp volts. this connects c3 in par- allel with the reservoir capacitor c4. if the voltage across c4 plus a diode drop (v pos + v diode ) is smaller than the level-shifted flying capacitor voltage (v c3 + v supp ), charge flows from c3 to c4 until the diode (d3) turns off. pin description (continued) pin name function 8 fbn negative charge-pump regulator feedback input. regulates to 0v nominal. 9 shdn active-low logic-level shutdown input. connect shdn to in for normal operation. 10 drvn negative charge-pump driver output. output high level is v supn , and low level is pgnd. 11 supn negative charge-pump driver supply voltage. bypass to pgnd with a 0.1? capacitor. 12 drvp positive charge-pump driver output. output high level is v supp , and low level is pgnd. 13 supp positive charge-pump driver supply voltage. bypass to pgnd with a 0.1? capacitor. 14 pgnd power ground. connect to gnd underneath the ic. 15 lx main boost regulator power mosfet n-channel drain. connect output diode and output capacitor as close to pgnd as possible. 16 tgnd must be connected to ground.
max1748/max8726 triple-output tft-lcd dc-dc converters _______________________________________________________________________________________ 9 soft-start for the main boost regulator, soft-start allows a gradual increase of the internal current-limit level during startup to reduce input surge currents. the max1748/max8726 divide the soft-start period into four phases. during phase 1, the max1748/max8726 limit the current limit to only 0.38a (see the electrical characteristics tables), approximately a quarter of the maximum current limit (i lx(max) ). if the output does not reach regulation within 1ms, soft-start enters phase ii and the current limit is increased by another 25%. this process is repeated for phase iii. the maximum 1.5a (typ) current limit is reached at the end of phase iii or when the output reaches regulation, whichever occurs first (see the start- up waveforms in the typical operating characteristics ). for the charge pumps, soft-start is achieved by control- ling the rise rate of the output voltage. the output volt- age regulates within 4ms, regardless of output capacitance and load, limited only by the regulator? output impedance. shutdown a logic-low level on shdn disables all three max1748/max8726 converters and the reference. when shut down, supply current drops to 0.1? to maximize battery life and the reference is pulled to ground. the output capacitance and load current determine the rate at which each output voltage will decay. a logic-level high on shdn power activates the max1748/max8726 (see the power-up sequencing section). do not leave shdn floating. if unused, connect shdn to in. power-up sequencing upon power-up or exiting shutdown, the max1748 and max8726 start their respective power-up sequences. lx gnd pgnd 1.25v r2 v in = 2.7v to 5.5v l1 in r1 q r s osc ref fb v main (up to 13v) v out = [1 + (r1 / r2)] x v ref v ref = 1.25v i lim c1 c2 c comp r comp d1 intg + + + - + - - max1748 max8726 gm - + - c intg figure 1. pwm boost converter block diagram
max1748/max8726 triple-output tft-lcd dc-dc converters 10 ______________________________________________________________________________________ gnd pgnd r6 c ref 0.22 f v supn = 2.7v to 13v v pos = (r5 / r6) x v ref v ref = 1.25v supn osc r5 v neg c5 c6 d5 d4 + - drvn fbn ref max1748 max8726 + - v ref 1.25v figure 2. negative charge-pump block diagram gnd pgnd v ref 1.25v r4 v supp = 2.7v to 13v v pos = [1 + (r3 / r4)] x v ref v ref = 1.25v supp osc r3 v pos c3 c4 d3 d2 + - drvp fbp max1748 max8726 + - figure 3. positive charge-pump block diagram
max1748/max8726 triple-output tft-lcd dc-dc converters ______________________________________________________________________________________ 11 in the max1748, the reference powers up first, then the main dc-dc step-up converter powers up with soft- start enabled. once the main step-up converter reach- es regulation, the negative charge pump turns on. when the negative output voltage reaches approxi- mately 88% of its nominal value (v fbn < 110mv), the positive charge pump starts up. finally, when the posi- tive output voltage reaches 90% of its nominal value (v fbp > 1.125v), the active-low ready signal ( rdy ) goes low (see the power ready section). in the max8726, the reference powers up first. after the reference is in regulation, the main dc-dc step-up con- verter powers up with soft-start enabled. the negative charge pump is enabled when the main step-up con- verter reaches regulation, and at least 16ms (typ) after the main step-up converter has been enabled. the posi- tive charge pump is enabled when the negative output voltage reaches approximately 88% of its nominal value (v fbn < 110mv), and at least 4ms (typ) after the nega- tive charge pump has been enabled. finally, when the positive output voltage reaches 90% of its nominal value (v fbp > 1.125v), the active-low ready signal ( rdy ) goes low (see the power ready section). power ready power ready is an open-drain output. when the power- up sequence is properly completed, the mosfet turns on and pulls rdy low with a typical 125 on-resis- tance. if a fault is detected, the internal open-drain mosfet appears as a high impedance. connect a 100k pullup resistor between rdy and in for a logic- level output. fault detection once rdy is low and if any output falls below its fault- detection threshold, rdy goes high impedance. for the reference, the fault threshold is 1.05v. for the main boost converter, the fault threshold is 88% of its nominal value (v fb < 1.1v). for the negative charge pump, the fault threshold is approximately 90% of its nominal value (v fbn < 130mv). for the positive charge pump, the fault threshold is 88% of its nominal value (v fbp < 1.11v). once an output faults, all outputs later in the power sequence shut down until the faulted output rises above its power-up threshold. for example, if the nega- tive charge-pump output voltage falls below the fault- detection threshold, the main boost converter remains active while the positive charge pump stops switching and its output voltage decays, depending on output capacitance and load. the positive charge-pump out- put will not power up until the negative charge-pump output voltage rises above its power-up threshold (see the power-up sequencing section). voltage reference the voltage at ref is nominally 1.25v. the reference can source up to 50? with good load regulation (see the typical operating characteristics ). connect a 0.22? bypass capacitor between ref and gnd. design procedure main boost converter output voltage selection adjust the output voltage by connecting a voltage- divider from the output (v main ) to fb to gnd (see the typical operating circuit ). select r2 in the 10k to 20k range. higher resistor values improve efficiency at low output current but increase output voltage error due to the feedback input bias current. calculate r1 with the following equations: r1 = r2 [(v main / v ref ) - 1] where v ref = 1.25v. v main can range from v in to 13v. feedback compensation for stability, add a pole-zero pair from fb to gnd in the form of a series resistor (r comp ) and capacitor (c comp ). the resistor should be half the value of the r2 feedback resistor. inductor selection inductor selection depends on input voltage, output voltage, maximum current, switching frequency, size, and availability of inductor values. other factors can include efficiency and ripple voltage. inductors are specified by their inductance (l), peak current (i peak ), and resistance (r l ). the following boost-circuit equa- tions are useful in choosing inductor values based on the application. they allow the trading of peak current and inductor value while allowing for consideration of component availability and cost. the following equation includes a constant lir, which is the ratio of the inductor peak-to-peak ac current to maximum average dc inductor current. a good com- promise between the size of the inductor, loss, and out- put ripple is to choose an lir of 0.3 to 0.5. the peak inductor current is then given by: i iv efficiency v 1 (lir/2) peak main(max) main in(min) = + []
max1748/max8726 triple-output tft-lcd dc-dc converters the inductance value is then given by: considering the typical operating circuit, the maximum dc load current (i main(max) ) is 200ma with a 10v output. a 6.8? inductance value is then chosen, based on the above equations and using 85% efficiency and a 1mhz operating frequency. smaller inductance values typically offer a smaller physical size for a given series resistance and current rating, allowing the smallest overall circuit dimensions. however, due to higher peak inductor currents, the output voltage ripple (i peak x output filter capacitor esr) will be higher. use inductors with a ferrite core or equivalent; powder iron cores are not recommended for use with the max1748/max8726s?high switching frequencies. the inductor? maximum current rating should exceed i peak . under fault conditions, inductor current may reach up to 2.0a. the max1748/max8726s?fast cur- rent-limit circuitry allows the use of soft-saturation inductors while still protecting the ic. the inductor? dc resistance significantly affects effi- ciency. for best performance, select inductors with resistance less than the internal n-channel fet resis- tance. to minimize radiated noise in sensitive applica- tions, use a shielded inductor. the inductor should have as low a series resistance as possible. for continuous inductor current, the power loss in the inductor resistance, p lr , is approximated by: p lr ? (i main x v main / v in ) 2 x r l where r l is the inductor series resistance. output capacitor a 10? capacitor works well in most applications. the equivalent series resistance (esr) of the output-filter capacitor affects efficiency and output ripple. output voltage ripple is largely the product of the peak induc- tor current and the output capacitor esr. use low-esr ceramic capacitors for best performance. low-esr, surface-mount tantalum capacitors with higher capacity may be used for load transients with high peak cur- rents. voltage ratings and temperature characteristics should be considered. input capacitor the input capacitor (c in ) in boost designs reduces the current peaks drawn from the input supply and reduces noise injection. the value of c in is largely determined by the source impedance of the input supply. high source impedance requires high input capacitance, particularly as the input voltage falls. since step-up dc-dc convert- ers act as ?onstant-power?loads to their input supply, input current rises as input voltage falls. a good starting point is to use the same capacitance value for c in as for c out . table 1 lists suggested component suppliers. integrator capacitor the max1748/max8726 contain an internal current integrator that improves the dc load regulation but increases the peak-to-peak transient voltage (see the load-transient waveforms in the typical operating characteristics ). for highly accurate dc load regula- tion, enable the current integrator by connecting a 470pf capacitor to intg. to minimize the peak-to-peak transient voltage at the expense of dc regulation, dis- able the integrator by connecting intg to ref and adding a 100k resistor to gnd. rectifier diode use a schottky diode with an average current rating equal to or greater than the peak inductor current, and a voltage rating at least 1.5 times the main output volt- age (v main ). l v efficiency (v v ) vliri f in(min) 2 main in(min) (main) 2 main(max) osc = ? table 1. component suppliers 12 ______________________________________________________________________________________ supplier phone fax inductors coilcraft 847-639-6400 847-639-1469 coiltronics 561-241-7876 561-241-9339 sumida usa 847-956-0666 847-956-0702 toko 847-297-0070 847-699-1194 capacitors avx 803-946-0690 803-626-3123 kemet 408-986-0424 408-986-1442 sanyo 619-661-6835 619-661-1055 taiyo yuden 408-573-4150 408-573-4159 diodes central semiconductor 516-435-1110 516-435-1824 international rectifier 310-322-3331 310-322-3332 motorola 602-303-5454 602-994-6430 nihon 847-843-7500 847-843-2798 zetex 516-543-7100 516-864-7630
max1748/max8726 triple-output tft-lcd dc-dc converters ______________________________________________________________________________________ 13 charge pump efficiency considerations the efficiency characteristics of the max1748/max8726 regulated charge pumps are similar to a linear regulator. they are dominated by quiescent current at low output currents and by the input voltage at higher output cur- rents (see the typical operating characteristics ). so the maximum efficiency can be approximated by: efficiency ? v neg / [v in ? n]; for the negative charge pump efficiency ? v pos / [v in ? (n + 1)]; for the positive charge pump where n is the number of charge-pump stages. output voltage selection adjust the positive output voltage by connecting a volt- age-divider from the output (v pos ) to fbp to gnd (see the typical operating circuit ). adjust the negative out- put voltage by connecting a voltage-divider from the output (v neg ) to fbn to ref. select r4 and r6 in the 50k to 100k range. higher resistor values improve efficiency at low output current but increase output-volt- age error due to the feedback input bias current. calculate the remaining resistors with the following equations: r3 = r4 [(v pos / v ref ) - 1] r5 = r6 (v neg / v ref ) where v ref = 1.25v. v pos can range from v supp to 40v, and v neg can range from 0 to -40v. flying capacitor increasing the flying capacitor? value reduces the out- put current capability. above a certain point, increasing the capacitance has a negligible effect because the output current capability becomes dominated by the internal switch resistance and the diode impedance. start with 0.1? ceramic capacitors. smaller values can be used for low-current applications. charge-pump output capacitor increasing the output capacitance or decreasing the esr reduces the output ripple voltage and the peak-to- peak transient voltage. use the following equation to approximate the required capacitor value: c out [i out / (500khz x v ripple )] charge-pump input capacitor use a bypass capacitor with a value equal to or greater than the flying capacitor. place the capacitor as close to the ic as possible. connect directly to pgnd. rectifier diode use schottky diodes with a current rating equal to or greater than 4 times the average output current, and a voltage rating at least 1.5 times v supp for the positive charge pump and v supn for the negative charge pump. pc board layout and grounding careful printed circuit layout is extremely important to minimize ground bounce and noise. first, place the main boost-converter output diode and output capacitor less than 0.2in (5mm) from the lx and pgnd pins with wide traces and no vias. then place 0.1? ceramic bypass capacitors near the charge-pump input pins (supp and supn) to the pgnd pin. keep the charge- pump circuitry as close to the ic as possible, using wide traces and avoiding vias when possible. locate all feedback resistive dividers as close to their respective feedback pins as possible. the pc board should fea- ture separate gnd and pgnd areas connected at only one point under the ic. to maximize output power and efficiency and to minimize output-power ripple voltage, use extra wide power ground traces and solder the ic? power ground pin directly to it. avoid having sensitive traces near the switching nodes and high-current lines. refer to the max1748/max8726 evaluation kit for an example of proper board layout. applications information boost converter using a cascoded mosfet for applications that require output voltages greater than 13v, cascode an external n-channel mosfet (figure 4). place the mosfet as close to the lx pin as possible. connect the gate to the input voltage (v in ) and the source to lx. mosfet selection choose a mosfet with an on-resistance (r ds(on) ) lower than the internal n-channel mosfet. lower r ds(on) will improve efficiency. the external n-channel mosfet must have a drain-voltage rating higher than the main output voltage (v main ). chip information transistor count: 2846
max1748/max8726 triple-output tft-lcd dc-dc converters 14 ______________________________________________________________________________________ c intg 470pf c ref 0.22 f r4 49.9k r3 1m 0.22 f 6.8 h 0.1 f 1.0 f 0.47 f v main = +18v, 140ma v neg = -8v, 20ma r5 319k r6 49.9k v in = 5.0v supn shdn rdy v pos = +25v, 5ma r2 10k r1 130k r comp 5k c comp 68nf c out 10 f in supp lx fb drvp fbp intg tgnd gnd fbn ref pgnd max1748 max8726 0.22 f 0.1 f 0.47 f 3.3 f 100k drvn 1.0 f figure 4. power supply using cascoded mosfet
max1748/max8726 triple-output tft-lcd dc-dc converters ______________________________________________________________________________________ 15 c ref 0.22 f c intg 470pf r4 49.9k r3 670k 0.1 f 6.8 h v in = 3.0v shdn rdy v pos = +15v, 10ma r2 10k r1 70k r comp 5k c comp 6.8nf v main = +10v, 200ma c out 10 f in lx fb supn supp drvp fbp pgnd drvn intg tgnd gnd max1748 max8726 0.1 f 1.0 f r5 200k r6 49.9k v neg = -5v, 20ma fbn ref 0.1 f 0.1 f 1.0 f 0.1 f 3.3 f 100k typical operating circuit
max1748/max8726 triple-output tft-lcd dc-dc converters maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 16 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2004 maxim integrated products is a registered trademark of maxim integrated products. tssop4.40mm.eps package outline, tssop 4.40mm body 21-0066 1 1 i package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .)

▲Up To Search▲

Price & Availability of MAX8726EUE-T

	To Download MAX8726EUE-T Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .